The present invention relates to data processing and more particularly relates to a method and apparatus for controlling the transmission of data between registers in a look-ahead program execution system.
In a data-processing system, the instructions constituting a program are recorded in one or more stores or memories and are carried out sequentially by the system. While the program is being carried out, alterations can be made, either deliberately or inadvertently, to the content of certain instructions contained in the program.
In most data processing systems, instructions follow each other in sequential order. For example, an instruction a stored at an address A might be programmed for execution immediately prior to an instruction b stored at an address B. Instruction a is normally read into an execution register while it is being executed or carried out. In order to save time during processing, some systems have a look-ahead feature in which instruction b is stored in a special buffer memory or register while instruction a is being executed. Once instruction a has been carried out, instruction b is at once available for execution or appropriate processing.
In practice, the buffer register is of limited capacity and it is not an instruction which is stored (since the instructions vary in length), but a certain number of data bits.
When instruction b at address B is altered for any reason, and is replaced by an instruction b' while instruction a is being carried out, the buffer register will transmit instruction b to the execution register, rather than instruction b'. Of course, this procedure will give the wrong result.
It is an object of the present invention to prevent instruction b stored in the buffer register from being carried out if a modification is made in instruction b while instruction a is being carried out.
One feature of the present invention provides a method for taking into account dynamic alterations made to a program in a data-processing system provided with a look-ahead buffer store or register, wherein the progress of the program is arrested and returned to a chosen point when a new instruction replaces the instruction stored in the buffer register.
According to another feature, the program is arrested when the address of the new instruction read into the program memory and the address of the instruction contained in the buffer store are the same. A comparison operation prevents the instruction stored in the buffer register from being transferred to the execution register which would carry it out.
Another feature of the present invention provides an apparatus which employs the above method and which contains a buffer register into which is read the instruction following the instruction being carried out and stored in an execution register. A logic gate connected between the buffer register and the execution register is responsive to an inhibit signal generated by a logic means to prevent the transmission of data between the buffer and execution registers. The logic means produces the inhibit signal in response to a read-in signal which indicates that the new instruction is being read into the program memory and an output signal from a comparator which compares the address of the new instruction with the address of the instruction contained in the buffer register.
In accordance with another feature of the invention, the combined generation of the inhibit signal and a signal to indicate that the instruction stored in the execution register has been carried out causes the new instruction to be read out of the program memory into the buffer register.
The way in which the program is carried out is thus unaffected by the fact that the instructions of which it is made up are read out in advance, since transfer of the contents of the buffer register to the execution register is inhibited if an instruction is modified. Furthermore, as was mentioned above, the buffer register may record a certain number of instruction bits which may form a partial instruction or a number of instructions. The method according to the invention may be applied automatically in all cases, whereas practically nothing can be done to improve the situation from the software point of view, bearing in mind that the instructions are of different lengths whereas the buffer register can only contain a constant number of bits.